EPROM and the Floating Gate

EPROMs with quartz windows are still cheap and plentiful second-hand — a 27C256 or 2764 costs very little. Buy several, because part of this step is destroying the assumption that erasure is instant. SAFETY FIRST, AND IT IS NOT OPTIONAL. Erasure needs shortwave ultraviolet at 254 nanometres, which is UVC. It causes photokeratitis — welder's flash, an intensely painful corneal burn — from exposures measured in seconds, and it burns skin. The symptoms appear hours later, which is why people misjudge it. Use a purpose-made EPROM eraser with an interlocked lid, or if you must use a bare germicidal tube, put it inside a closed metal box and never operate it with a line of sight to your eyes. Ordinary spectacles do not stop UVC reliably; polycarbonate safety glasses do. Do not use a blacklight or a nail lamp — those are UVA at 365 nanometres and will not erase anything, which is itself a useful thing to demonstrate. READ IT FIRST. Put the EPROM in a programmer and read the whole device. Note the pattern — a used one will hold whatever it was programmed with. NOW ERASE IN STEPS. Put it under the lamp and read it back at 1, 2, 5, 10, 15, 20 and 30 minutes. Do not just erase it and check at the end; the intermediate readings are the measurement. WHAT YOU WILL SEE, and it is the interesting part. Erasure is not a moment, it is a distribution. At short exposures a few bits have flipped to 1 and most have not. As exposure continues the fraction erased climbs steeply and then flattens, leaving a stubborn tail of bits that take far longer than the rest. Plot percentage erased against time. That tail is why datasheets specify 20 to 30 minutes when 90 percent of the array is done in eight. The specification is set by the LAST bit, not the typical one — the same tail logic as the DRAM refresh interval two blueprints ago, appearing again in a completely different mechanism. MEASURE THE DOSE, not just the time. Erasure depends on total energy delivered, so distance matters as the inverse square. Repeat at twice the distance and you should need roughly four times the time. If you get that, you have demonstrated that the mechanism is photon dose rather than anything about elapsed time. THEN PROVE THE WAVELENGTH MATTERS. Expose one under a UVA blacklight for an hour. Nothing happens. The energy of a 365 nanometre photon is about 3.4 electron-volts and the barrier the trapped electron has to clear is over 3 volts higher than that. Photons below the threshold do not add up — a million weak ones will not do what one strong one does, which is the photoelectric effect stated in a form you can hold in your hand.

The previous step read bits. This one measures the physical quantity underneath them, which is the point where the floating gate stops being an abstraction. A programmed cell and an erased cell are the same transistor. The only difference is how much charge sits on the island inside its gate oxide, and that charge shifts the voltage at which the transistor turns on. Everything else — the sense circuitry, the array, the pinout — exists to turn that voltage shift into a logic level. YOU CANNOT PROBE A CELL directly; it is buried under a package. What you CAN do is vary the supply voltage and watch the array's behaviour change, because the read circuitry's reference scales with the supply while the stored threshold does not. Put a fully erased EPROM in a programmer or a simple read jig and read it at reducing supply voltage: 5.0, 4.5, 4.0, 3.5, 3.0 volts. Record the error count at each. Then program a known pattern and repeat. Erased cells — low threshold, transistor conducts easily — keep reading correctly well below the nominal supply. Programmed cells — high threshold — start failing first as the supply falls, because the margin between the stored threshold and the read reference closes. The supply voltage at which errors begin is a proxy for the threshold window, and comparing a fresh device against one that has been programmed and erased many times shows that window narrowing. That narrowing is the ageing mechanism. NOW ACCELERATE THE RETENTION TEST. Ten-year retention cannot be measured in an afternoon, but it can be accelerated, because charge loss over the oxide barrier is a thermally activated process and follows Arrhenius. Bake a programmed EPROM in a domestic oven at 125 degrees Celsius — well within the package's rating, and well below anything that damages it — for several hours, reading it periodically. With an activation energy around 1.4 electron-volts for oxide charge loss, an hour at 125 degrees is worth a great many years at 25. The notebook does that arithmetic. What you should observe is a device that still reads perfectly, which is the correct and slightly anticlimactic result: the barrier really is that good. If you have a device that has been erased and reprogrammed dozens of times, bake that one alongside. It is far more likely to lose bits, because each erase cycle leaves a little damage in the oxide and damaged oxide leaks. That contrast — a fresh part surviving and a worn part failing under identical stress — is the endurance mechanism made visible, and it is exactly what the next blueprint has to manage at a scale of thousands of cycles.