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The Eccles-Jordan Flip-Flop
Ed

作成者

Ed

27. 8月 2026FI
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The Eccles-Jordan Flip-Flop

Every gate so far has been forgetful. Change the inputs and the output changes immediately, so a network of gates computes but remembers nothing — and a machine that cannot remember cannot count, store a result, or hold an instruction. In 1918 William Eccles and Frank Jordan cross-coupled two valve amplifiers so each one’s output drove the other’s input, and produced a circuit with two stable states that stays in whichever one it was put into. It is the same positive feedback as the regenerative receiver in the radio batch, pushed deliberately past the point of no return: instead of oscillating, it latches. That single circuit is the origin of electronic memory, of the counter, of the register, and ultimately of every bit of RAM ever manufactured.
中級者
5 hours

手順

1

Cross-couple two amplifiers and watch it latch

Build it with two transistors — the topology is identical to the 1918 valve original and runs at 5 V instead of 200.

  1. Wire two common-emitter stages, each with a collector resistor.
  2. Cross-couple: transistor A’s collector to transistor B’s base through a resistor, and B’s collector to A’s base.
  3. Fit an LED on each collector.
  4. Power up and observe. Then briefly ground one base and release it.

One LED lights and the other does not, and it STAYS that way after you remove your hand. Ground the other base and the state flips and stays flipped.

The mechanism is a race that has already been won. If A conducts, it pulls B’s base low, so B is off, so B’s collector is high, which keeps A’s base high, which keeps A on. Each state reinforces itself, so both are stable and there is no third option.

Which state it lands in at power-up is genuinely unpredictable — decided by tiny mismatches in the two transistors and by noise. That is why real systems have a RESET line: a memory that starts in an unknown state is not memory yet.

このステップの材料:

Transistor Assortment (NPN/PNP)Transistor Assortment (NPN/PNP)1 キット
Resistor KitResistor Kit1 キット
LED Indicator SetLED Indicator Set1 セット
Perfboard / ProtoboardPerfboard / Protoboard1
Hookup Wire (22 AWG)Hookup Wire (22 AWG)1 reel

必要な工具:

Soldering Station (Temperature Controlled)Soldering Station (Temperature Controlled)
Oscilloscope 2-Channel 100MHzOscilloscope 2-Channel 100MHz
Digital Multimeter (Lab Grade)Digital Multimeter (Lab Grade)
Adjustable Bench Power Supply (30V/5A)Adjustable Bench Power Supply (30V/5A)
2

The SR latch state table, including the forbidden one

Trace all four input combinations on your circuit and confirm each. The first one — both inputs inactive — is the whole point: the circuit does nothing, and doing nothing is how it remembers.

The fourth is the interesting failure. Asserting SET and RESET together demands the output be both 1 and 0; the circuit obeys as best it can, and on release the two halves race. Which one wins is decided by propagation delays of a few nanoseconds, so the same circuit can settle differently on identical inputs.

That is metastability, and it never fully goes away — it is pushed into a smaller and smaller time window as circuits get faster. Every clocked system has setup and hold times precisely because data changing too close to a clock edge can put a flip-flop into this race, and a synchroniser is two flip-flops in series giving the first one a whole clock period to make up its mind.

Flow

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必要な工具:

Desktop ComputerDesktop Computer
3

Add a clock, and make it count

Upload and open the serial monitor. Part 1 drives the latch you built and — crucially — reads Q back 500 ms after every input has gone idle. If Q is unchanged, the circuit stored a bit with nothing holding it there.

Part 2 models four toggle flip-flops in a chain. Watch the toggles column: most clocks flip only one stage, but every so often a carry ripples through all four. That variable propagation is the ripple counter's defect — the count is briefly wrong while the carry travels, so you must not read it mid-ripple.

Synchronous counters clock every stage from the same edge to fix this, at the cost of more logic. The trade — ripple is cheap and briefly wrong, synchronous is expensive and always right — is the same one the whole batch keeps meeting.
flipflop_counter.inoarduino
/*
  Flip-flop behaviour and a ripple counter
  Youblob blueprint: The Eccles-Jordan Flip-Flop

  PART 1 exercises a real SR latch you have built on the bench.
  PART 2 models a chain of toggle flip-flops in software so you can SEE why a
  ripple counter is a binary counter, and why its carry takes time to settle.

  Hardware for PART 1:
    D2 -> SET input of your latch
    D3 -> RESET input
    D4 <- Q output (through a divider if your latch runs above 5 V)
*/

const int PIN_SET = 2, PIN_RESET = 3, PIN_Q = 4;
const int NBITS = 4;
bool ff[NBITS];                 // modelled toggle flip-flops

void pulse(int pin) { digitalWrite(pin, HIGH); delay(5); digitalWrite(pin, LOW); }

void setup() {
  Serial.begin(115200);
  pinMode(PIN_SET, OUTPUT); pinMode(PIN_RESET, OUTPUT); pinMode(PIN_Q, INPUT);
  digitalWrite(PIN_SET, LOW); digitalWrite(PIN_RESET, LOW);

  Serial.println(F("--- PART 1: the real latch ---"));
  pulse(PIN_RESET); Serial.print(F("after RESET, Q = ")); Serial.println(digitalRead(PIN_Q));
  pulse(PIN_SET);   Serial.print(F("after SET,   Q = ")); Serial.println(digitalRead(PIN_Q));
  delay(500);
  // no input asserted at all -- if Q is unchanged, the circuit is REMEMBERING
  Serial.print(F("500 ms later, inputs idle, Q = ")); Serial.println(digitalRead(PIN_Q));
  Serial.println(F("Unchanged means it stored a bit with no power to the inputs.\n"));

  Serial.println(F("--- PART 2: ripple counter ---"));
  Serial.println(F("clk  Q3 Q2 Q1 Q0  value  toggles"));
}

void loop() {
  static int clk = 0;
  if (clk > 16) { delay(5000); return; }

  // A toggle flip-flop flips on each rising edge of ITS input; bit n is clocked
  // by bit n-1. That cascade is why it counts in binary -- and why the carry
  // RIPPLES rather than arriving everywhere at once.
  int toggles = 0;
  for (int i = 0; i < NBITS; i++) {
    ff[i] = !ff[i]; toggles++;
    if (ff[i]) break;           // stopped propagating: this stage stayed high
  }

  int value = 0;
  for (int i = 0; i < NBITS; i++) if (ff[i]) value |= (1 << i);

  Serial.print(clk); Serial.print(F("    "));
  for (int i = NBITS - 1; i >= 0; i--) { Serial.print(ff[i]); Serial.print(' '); }
  Serial.print(F(" ")); Serial.print(value);
  Serial.print(F("      ")); Serial.println(toggles);

  clk++;
  delay(400);
}

このステップの材料:

Microcontroller BoardMicrocontroller Board1
Transistor Assortment (NPN/PNP)Transistor Assortment (NPN/PNP)1 キット
Resistor KitResistor Kit1 キット
Hookup Wire (22 AWG)Hookup Wire (22 AWG)1 reel

必要な工具:

Computer with Arduino IDEComputer with Arduino IDE
Oscilloscope 2-Channel 100MHzOscilloscope 2-Channel 100MHz
Digital Multimeter (Lab Grade)Digital Multimeter (Lab Grade)
Soldering Station (Temperature Controlled)Soldering Station (Temperature Controlled)
4

Measure setup, hold and the metastable window

Find the timing rules that every synchronous system obeys, by violating them.

  1. Clock a D-type flip-flop from a generator and feed data from a second generator, slightly offset in frequency so the data edge slowly walks across the clock edge.
  2. Watch the output on the oscilloscope, triggered on the clock.
  3. Find the region where the output sometimes takes noticeably longer to settle, or lands on the wrong value.

There is a window around the clock edge where the flip-flop cannot decide quickly — data must be stable for a setup time BEFORE the edge and a hold time AFTER it, and inside that window the output resolution time stretches unpredictably.

It is worth being precise about why this cannot be engineered away: the flip-flop is deciding which of two stable states to fall into, and if pushed exactly to the boundary it sits near the balance point. Nothing forces it off quickly. You cannot make the probability zero — only make the window small and give the circuit time. This is a genuine physical limit, not a manufacturing defect.

このステップの材料:

Logic IC Assortment (74HC Series)Logic IC Assortment (74HC Series)1 キット
Perfboard / ProtoboardPerfboard / Protoboard1

必要な工具:

Oscilloscope 2-Channel 100MHzOscilloscope 2-Channel 100MHz
Function Generator 10MHzFunction Generator 10MHz
Signal GeneratorSignal Generator
Digital Multimeter (Lab Grade)Digital Multimeter (Lab Grade)
5

One bit costs two transistors — now scale it

Count the cost of memory, because that number shaped every computer built before 1970.

  1. Count the components in your latch: transistors, resistors, connections.
  2. Multiply by 8 for a byte, by 1024 for a kilobyte.
  3. Estimate power: measure the current your single latch draws and scale it.

A flip-flop is fast and expensive. Two active devices per bit means a kilobyte of flip-flop memory needs some sixteen thousand transistors and draws real power continuously — in the valve era it meant sixteen thousand valves, each with a heater, each eventually failing.

That is why early machines had tiny fast register memory and desperately sought something cheaper for bulk storage. Mercury delay lines, Williams tubes and magnetic cores were all answers to this one economic problem, and each traded speed or convenience for cost per bit.

The flip-flop never went away — it is still what a CPU register and a cache cell are made of, because nothing beats it for speed. It simply stopped being how you store megabytes. That split between a small fast expensive store and a large slow cheap one is the memory hierarchy, and it exists in every computer today for exactly the reason you have just measured.

必要な工具:

Digital Multimeter (Lab Grade)Digital Multimeter (Lab Grade)
Desktop ComputerDesktop Computer

材料

7

必要な工具

8

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