The Integrated Circuit — Noyce's Monolithic Planar

The claim under test is that printed interconnect costs the same regardless of how many wires it carries. You proved you can pattern a film in the photolithography blueprint. Now use it to make the point quantitatively. DESIGN TWO MASKS. The first carries a single conductor, a track 500 micrometres wide running 40 millimetres. The second carries FIFTY parallel tracks of the same width and length, on a 1 millimetre pitch. Draw them in any vector tool and print both on transparency at the same density. RUN THE PROCESS ON BOTH. Laminate resist, expose, develop, etch, strip — the identical five operations, side by side, at the same time, in the same tray. NOW TIME IT, and this is the entire step. Record the wall-clock time for each operation on each board. You will find they are the same to within your ability to measure. Fifty conductors took no longer than one. The developer does not know how many features it is developing; the etchant does not care; the exposure is one exposure. Then do the honest comparison. Take fifty pieces of wire and solder them between two rows of pads on a piece of stripboard, and time THAT. Twenty to forty minutes, and it scales linearly: five hundred wires would take ten times as long and a person would make mistakes. That ratio, and the fact that it grows without limit as the count rises, IS Noyce's invention. Nothing about the physics is subtle. The economics are the whole content. MEASURE WHERE IT BREAKS, because it does break. Inspect your fifty-track board under the microscope and look for shorts between adjacent tracks and for breaks within a track. Count them. Then compute the probability that ALL fifty tracks are good — if a single track has a 99 percent chance of being perfect, fifty of them together have a 60 percent chance. That is the yield arithmetic from the planar blueprint arriving in a new place. Printed interconnect makes wiring free in LABOUR and charges for it in YIELD instead, and the whole history of semiconductor manufacturing is the effort to push that defect rate down far enough that the trade stays worthwhile at a billion wires. A note on what this is and is not. You are patterning 500 micrometre copper tracks on a board, where Noyce patterned 25 micrometre aluminium on oxide. The scale differs by twenty; the operations, the failure modes and the labour argument are identical. Where this diverges from the real thing is that aluminium on oxide must also make a good ohmic contact to silicon through the contact holes, and getting that contact reliable — without the aluminium spiking down through a shallow junction — was a materials problem that took years and does not appear at all on copper-clad board.

WHAT DID EACH PATENT ACTUALLY CLAIM? Kilby's, filed February 1959, claims a body of semiconductor material with regions forming the several circuit components and electrical connections between them — and his drawings show gold wires. Noyce's, filed July 1959, claims a structure in which an insulating oxide layer covers the junctions and conductive material is DEPOSITED ON that layer to interconnect the regions. The distinction the courts eventually settled on is exactly the one this pair of blueprints is built around: the components, versus the interconnect. WHY DID FAIRCHILD LOSE THE PRIORITY FIGHT AND STILL WIN? The Court of Customs and Patent Appeals found for Noyce on the interconnect claims in 1970, but by then it hardly mattered commercially. The companies had cross-licensed in 1966 and everyone building integrated circuits paid both. What decided the industry was not the patent but the manufacturability: Noyce's structure could be made by a process Fairchild already ran, and Kilby's could not be made in volume by anyone. WHY IS SILICON ESSENTIAL TO NOYCE'S VERSION AND NOT KILBY'S? Because Noyce's depends completely on the oxide, and only silicon has a good one. Kilby's germanium bar needed no oxide — the wires were bonded directly. So the sibling relationship has a materials constraint attached: the hybrid approach is material-agnostic and can integrate gallium arsenide, silicon carbide and silicon in one module, which is a genuine advantage and one reason it persists for radio-frequency and power work. WHAT WAS THE FIRST COMMERCIAL PRODUCT? Fairchild's Micrologic family from 1961, starting with a flip-flop of four transistors and five resistors. Four transistors. The yield arithmetic from the planar blueprint explains why: at the defect densities of 1961, anything larger yielded nothing. WHAT DOES THE COMPARISON TEACH THAT NEITHER BLUEPRINT TEACHES ALONE? That an invention can be complete, demonstrated, patented and correct, and still be the wrong answer for the next thirty years because its labour scales with the thing you were trying to eliminate. And that the same invention can be the right answer again later when the surrounding costs change. Kilby's approach did not fail; it waited. Anyone who files these two under duplicate loses precisely that, and it is the most useful thing in either of them.